1. Field
Exemplary embodiments of the present invention relate to semiconductor device fabrication technology, and more particularly, to a method for fabricating a semiconductor device including a storage node support layer.
2. Description of the Related Art
As semiconductor memory devices are highly integrated, the area of a memory cell decreases. To realize reliable operation characteristics in the decreasing memory cell area, a capacitor that may secure a capacitance for each memory cell is useful. More specifically, storage nodes (SN) are formed in a cylindrical shape and the heights of the cylindrical storage nodes are increased.
As the height of the storage nodes is increased within a limited area to secure capacitance, the storage nodes may lean. To protect the storage nodes from leaning, a method of forming a support layer connecting storage nodes to each other is introduced. A capacitor using a nitride layer as the support layer is referred to as a nitride floating capacitor (NFC).
FIGS. 1A to 1D are cross-sectional views illustrating a conventional method for fabricating a semiconductor device.
Referring to FIG. 1A, a mold layer 100 is formed over a substrate 11 including a structure, such as a storage node contact plug (SNC). Here, the mold layer 100 includes an etch stop layer 12, a first insulation layer 13, a support layer 14, and a second insulation layer 15 for preventing the support layer 14 from being lost between processes. The etch stop layer 12 and the support layer 14 are formed of a nitride layer, and the first insulation layer 13 and the second insulation layer 15 are formed of an oxide layer. The mold layer 100 is formed to have a height H higher than the height of a storage node to be formed.
Subsequently, a hard mask pattern 16 is formed over the mold layer 100.
Referring to FIG. 1B, storage node holes 17 are formed by using the hard mask pattern 16 as an etch barrier and etching the mold layer 100 until the substrate 11 is exposed.
Referring to FIG. 1C, after the hard mask pattern 16 is removed, a storage node conductive layer is formed along the surface of the structure including the storage node holes 17.
Subsequently, cylindrical storage nodes 18 are formed in the storage node holes 17 by performing a storage node isolation process.
Referring to FIG. 1D, the first insulation layer 13 and the second insulation layer 15 are removed by performing a dip-out process. As shown in FIG. 1D, the support layer 14 that remains after the dip-out process may protect the storage nodes 18 from leaning.
Subsequently, although not illustrated in the drawing, a capacitor is formed by sequentially forming a dielectric layer and a plate.
In the semiconductor device fabricated according to the conventional method, the support layer 14 protects the cylindrical storage nodes 18 from leaning during the dip-out process. At the same time, when the storage node holes 17 are formed, the support layer 14 prevents a bowing profile from being formed on the sidewalls of the cylindrical storage nodes 18.
More specifically, since the height of the storage node holes 17 are increased to increase the height of the storage nodes 18 within a limited area, the aspect ratio of the storage node holes 17 is increased. As the aspect ratio of the storage node holes 17 is increased, a bowing profile may be formed on the sidewalls of the upper regions (refer to a reference symbol ‘A’ of FIG. 1B) of the storage node holes 17. Since the support layer 14 that is formed of a nitride layer that has a denser layer quality than the first insulation layer 13 and the second insulation layer 15, a bowing profile may be prevented from being formed in a region where the support layer 14 is formed. Therefore, as the support layer 14 becomes thicker, a bowing profile may be prevented from being formed on the sidewalls of the storage node holes 17.
However, when the support layer 14 becomes thicker to prevent the formation of bowing profile, the total height H of the mold layer 100 is increased. Thus, the burden of performing the etch process that forms the storage node holes 17 is increased. The increased burden for forming the storage node holes 17 may causes issues or flaws. One such issue is called ‘Not Open’, which means that the substrate 11 may not be exposed by the etching process that forms the storage node holes 17.
Also, when the support layer 14 is thick, storage nodes may lean due to the thick support layer 14. Therefore, since a portion of the support layer 14 is to be etched during the storage node isolation process in order to control the thickness of the support layer 14, the burden of performing an etch process during the storage node isolation process is increased.